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Text File  |  1992-05-06  |  3KB  |  71 lines
  1. PAL20R6                                         PAL DESIGN SPECIFICATION
  2. TESTING OUTPUTS USING PAL20R4                       Bob Metzler 12/30/90
  3. 13-INPUT REGISTERED PRIORITY ENCODER
  4. EMERALD CITY,WASHINGTON
  5. CLK I0  I1   I2 I3 I4 I5 I6 I7  I8  I9  GND
  6. /OC I10 FLAG Q3 Q2 NC NC Q1 Q0  I11 I12 VCC
  7.  
  8. ; equations go here
  9.  
  10. /Q0 := /I0* I1
  11.      + /I0*/I1*/I2* I3
  12.      + /I0*/I1*/I2*/I3*/I4* I5
  13.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6* I7
  14.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8* I9
  15.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10* I11
  16.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12
  17.  
  18. /Q1 := /I0*/I1* I2
  19.      + /I0*/I1*/I2* I3
  20.      + /I0*/I1*/I2*/I3*/I4*/I5* I6
  21.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6* I7
  22.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9* I10
  23.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10* I11
  24.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12
  25.  
  26. /Q2 := /I0*/I1*/I2*/I3* I4
  27.      + /I0*/I1*/I2*/I3*/I4* I5
  28.      + /I0*/I1*/I2*/I3*/I4*/I5* I6
  29.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6* I7
  30.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11* I12
  31.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12
  32.  
  33. /Q3 := /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7* I8
  34.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8* I9
  35.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9* I10
  36.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10* I11
  37.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11* I12
  38.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12
  39.  
  40. /FLAG = /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12
  41.  
  42. FUNCTION TABLE
  43.  
  44. CLK /OC I12 I11 I10 I9 I8 I7 I6 I5 I4 I3 I2 I1 I0 Q3 Q2 Q1 Q0 FLAG
  45.  
  46. ; CHIP    FIFTEEN INPUTS    --OUTPUTS--
  47. ;CONTROL  111             QQQQ
  48. ;CLK /OC  2109876543210   3210   FLAG   COMMENTS
  49. ------------------------------------------------------------------------
  50.   C   L   XXXXXXXXXXXXH   HHHH    H      I0 INTERRUPT HIGHEST PRIORITY
  51.   C   L   XXXXXXXXXXXHL   HHHL    H      I1 INTERRUPT 
  52.   C   L   XXXXXXXXXXHLL   HHLH    H      I2 INTERRUPT 
  53.   C   L   XXXXXXXXXHLLL   HHLL    H      I3 INTERRUPT 
  54.   C   L   XXXXXXXXHLLLL   HLHH    H      I4 INTERRUPT 
  55.   C   L   XXXXXXXHLLLLL   HLHL    H      I5 INTERRUPT 
  56.   C   L   XXXXXXHLLLLLL   HLLH    H      I6 INTERRUPT 
  57.   C   L   XXXXXHLLLLLLL   HLLL    H      I7 INTERRUPT 
  58.   C   L   XXXXHLLLLLLLL   LHHH    H      I8 INTERRUPT 
  59.   C   L   XXXHLLLLLLLLL   LHHL    H      I9 INTERRUPT 
  60.   C   L   XXHLLLLLLLLLL   LHLH    H      I10 INTERRUPT 
  61.   C   L   XHLLLLLLLLLLL   LHLL    H      I11 INTERRUPT 
  62.   C   L   HLLLLLLLLLLLL   LLHH    H      I12 INTERRUPT LOWEST PRIORITY 
  63.   C   L   LLLLLLLLLLLLL   LLLL    L      NO INTERRUPT
  64.   X   H   XXXXXXXXXXXXX   ZZZZ    X      TEST HI-Z
  65. ------------------------------------------------------------------------
  66.  
  67. DESCRIPTION
  68. The 13-input registered priority encoder accepts 13 active low inputs
  69. (I0-I12) to load the binary weighted code of the priority order into
  70. the output registers (Q3-Q0) on the rising edge of the clock (CLK).
  71.